Update AES implementation - enable VIA padlock Untag 0.4.0beta1 git-svn-id: https://svn.code.sf.net/p/keepassx/code/trunk@255 b624d157-de02-0410-bad0-e51aec6abb33master
sniperbeamer
16 years ago
parent
8f8901694c
commit
13b3ab3cae
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@ -0,0 +1,529 @@ |
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/*
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--------------------------------------------------------------------------- |
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Copyright (c) 1998-2008, Brian Gladman, Worcester, UK. All rights reserved. |
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LICENSE TERMS |
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The redistribution and use of this software (with or without changes) |
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is allowed without the payment of fees or royalties provided that: |
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1. source code distributions include the above copyright notice, this |
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list of conditions and the following disclaimer; |
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2. binary distributions include the above copyright notice, this list |
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of conditions and the following disclaimer in their documentation; |
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3. the name of the copyright holder is not used to endorse products |
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built using this software without specific written permission. |
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DISCLAIMER |
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This software is provided 'as is' with no explicit or implied warranties |
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in respect of its properties, including, but not limited to, correctness |
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and/or fitness for purpose. |
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--------------------------------------------------------------------------- |
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Issue Date: 20/12/20077 |
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*/ |
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#ifndef AES_VIA_ACE_H |
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#define AES_VIA_ACE_H |
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#if defined( _MSC_VER ) |
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# define INLINE __inline |
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#elif defined( __GNUC__ ) |
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# define INLINE static inline |
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#else |
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# error VIA ACE requires Microsoft or GNU C |
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#endif |
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#define NEH_GENERATE 1 |
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#define NEH_LOAD 2 |
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#define NEH_HYBRID 3 |
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#define MAX_READ_ATTEMPTS 1000 |
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/* VIA Nehemiah RNG and ACE Feature Mask Values */ |
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#define NEH_CPU_IS_VIA 0x00000001 |
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#define NEH_CPU_READ 0x00000010 |
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#define NEH_CPU_MASK 0x00000011 |
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#define NEH_RNG_PRESENT 0x00000004 |
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#define NEH_RNG_ENABLED 0x00000008 |
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#define NEH_ACE_PRESENT 0x00000040 |
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#define NEH_ACE_ENABLED 0x00000080 |
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#define NEH_RNG_FLAGS (NEH_RNG_PRESENT | NEH_RNG_ENABLED) |
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#define NEH_ACE_FLAGS (NEH_ACE_PRESENT | NEH_ACE_ENABLED) |
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#define NEH_FLAGS_MASK (NEH_RNG_FLAGS | NEH_ACE_FLAGS) |
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/* VIA Nehemiah Advanced Cryptography Engine (ACE) Control Word Values */ |
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#define NEH_GEN_KEY 0x00000000 /* generate key schedule */ |
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#define NEH_LOAD_KEY 0x00000080 /* load schedule from memory */ |
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#define NEH_ENCRYPT 0x00000000 /* encryption */ |
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#define NEH_DECRYPT 0x00000200 /* decryption */ |
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#define NEH_KEY128 0x00000000+0x0a /* 128 bit key */ |
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#define NEH_KEY192 0x00000400+0x0c /* 192 bit key */ |
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#define NEH_KEY256 0x00000800+0x0e /* 256 bit key */ |
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#define NEH_ENC_GEN (NEH_ENCRYPT | NEH_GEN_KEY) |
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#define NEH_DEC_GEN (NEH_DECRYPT | NEH_GEN_KEY) |
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#define NEH_ENC_LOAD (NEH_ENCRYPT | NEH_LOAD_KEY) |
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#define NEH_DEC_LOAD (NEH_DECRYPT | NEH_LOAD_KEY) |
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#define NEH_ENC_GEN_DATA {\ |
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NEH_ENC_GEN | NEH_KEY128, 0, 0, 0,\
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NEH_ENC_GEN | NEH_KEY192, 0, 0, 0,\
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NEH_ENC_GEN | NEH_KEY256, 0, 0, 0 } |
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#define NEH_ENC_LOAD_DATA {\ |
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NEH_ENC_LOAD | NEH_KEY128, 0, 0, 0,\
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NEH_ENC_LOAD | NEH_KEY192, 0, 0, 0,\
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NEH_ENC_LOAD | NEH_KEY256, 0, 0, 0 } |
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#define NEH_ENC_HYBRID_DATA {\ |
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NEH_ENC_GEN | NEH_KEY128, 0, 0, 0,\
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NEH_ENC_LOAD | NEH_KEY192, 0, 0, 0,\
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NEH_ENC_LOAD | NEH_KEY256, 0, 0, 0 } |
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#define NEH_DEC_GEN_DATA {\ |
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NEH_DEC_GEN | NEH_KEY128, 0, 0, 0,\
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NEH_DEC_GEN | NEH_KEY192, 0, 0, 0,\
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NEH_DEC_GEN | NEH_KEY256, 0, 0, 0 } |
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#define NEH_DEC_LOAD_DATA {\ |
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NEH_DEC_LOAD | NEH_KEY128, 0, 0, 0,\
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NEH_DEC_LOAD | NEH_KEY192, 0, 0, 0,\
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NEH_DEC_LOAD | NEH_KEY256, 0, 0, 0 } |
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#define NEH_DEC_HYBRID_DATA {\ |
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NEH_DEC_GEN | NEH_KEY128, 0, 0, 0,\
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NEH_DEC_LOAD | NEH_KEY192, 0, 0, 0,\
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NEH_DEC_LOAD | NEH_KEY256, 0, 0, 0 } |
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#define neh_enc_gen_key(x) ((x) == 128 ? (NEH_ENC_GEN | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_ENC_GEN | NEH_KEY192) : (NEH_ENC_GEN | NEH_KEY256)) |
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#define neh_enc_load_key(x) ((x) == 128 ? (NEH_ENC_LOAD | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_ENC_LOAD | NEH_KEY192) : (NEH_ENC_LOAD | NEH_KEY256)) |
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#define neh_enc_hybrid_key(x) ((x) == 128 ? (NEH_ENC_GEN | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_ENC_LOAD | NEH_KEY192) : (NEH_ENC_LOAD | NEH_KEY256)) |
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#define neh_dec_gen_key(x) ((x) == 128 ? (NEH_DEC_GEN | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_DEC_GEN | NEH_KEY192) : (NEH_DEC_GEN | NEH_KEY256)) |
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#define neh_dec_load_key(x) ((x) == 128 ? (NEH_DEC_LOAD | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_DEC_LOAD | NEH_KEY192) : (NEH_DEC_LOAD | NEH_KEY256)) |
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#define neh_dec_hybrid_key(x) ((x) == 128 ? (NEH_DEC_GEN | NEH_KEY128) : \ |
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(x) == 192 ? (NEH_DEC_LOAD | NEH_KEY192) : (NEH_DEC_LOAD | NEH_KEY256)) |
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#if defined( _MSC_VER ) && ( _MSC_VER > 1200 ) |
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#define aligned_auto(type, name, no, stride) __declspec(align(stride)) type name[no] |
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#else |
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#define aligned_auto(type, name, no, stride) \ |
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unsigned char _##name[no * sizeof(type) + stride]; \
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type *name = (type*)(16 * ((((unsigned long)(_##name)) + stride - 1) / stride)) |
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#endif |
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#if defined( _MSC_VER ) && ( _MSC_VER > 1200 ) |
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#define aligned_array(type, name, no, stride) __declspec(align(stride)) type name[no] |
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#elif defined( __GNUC__ ) |
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#define aligned_array(type, name, no, stride) type name[no] __attribute__ ((aligned(stride))) |
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#else |
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#define aligned_array(type, name, no, stride) type name[no] |
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#endif |
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/* VIA ACE codeword */ |
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static unsigned char via_flags = 0; |
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#if defined ( _MSC_VER ) && ( _MSC_VER > 800 ) |
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#define NEH_REKEY __asm pushfd __asm popfd |
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#define NEH_AES __asm _emit 0xf3 __asm _emit 0x0f __asm _emit 0xa7 |
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#define NEH_ECB NEH_AES __asm _emit 0xc8 |
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#define NEH_CBC NEH_AES __asm _emit 0xd0 |
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#define NEH_CFB NEH_AES __asm _emit 0xe0 |
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#define NEH_OFB NEH_AES __asm _emit 0xe8 |
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#define NEH_RNG __asm _emit 0x0f __asm _emit 0xa7 __asm _emit 0xc0 |
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INLINE int has_cpuid(void) |
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{ char ret_value; |
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__asm |
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{ pushfd /* save EFLAGS register */ |
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mov eax,[esp] /* copy it to eax */ |
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mov edx,0x00200000 /* CPUID bit position */ |
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xor eax,edx /* toggle the CPUID bit */ |
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push eax /* attempt to set EFLAGS to */ |
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popfd /* the new value */ |
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pushfd /* get the new EFLAGS value */ |
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pop eax /* into eax */ |
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xor eax,[esp] /* xor with original value */ |
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and eax,edx /* has CPUID bit changed? */ |
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setne al /* set to 1 if we have been */ |
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mov ret_value,al /* able to change it */ |
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popfd /* restore original EFLAGS */ |
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} |
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return (int)ret_value; |
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} |
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INLINE int is_via_cpu(void) |
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{ char ret_value; |
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__asm |
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{ xor eax,eax /* use CPUID to get vendor */ |
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cpuid /* identity string */ |
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xor eax,eax /* is it "CentaurHauls" ? */ |
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sub ebx,0x746e6543 /* 'Cent' */ |
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or eax,ebx |
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sub edx,0x48727561 /* 'aurH' */ |
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or eax,edx |
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sub ecx,0x736c7561 /* 'auls' */ |
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or eax,ecx |
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sete al /* set to 1 if it is VIA ID */ |
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mov dl,NEH_CPU_READ /* mark CPU type as read */ |
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or dl,al /* & store result in flags */ |
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mov [via_flags],dl /* set VIA detected flag */ |
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mov ret_value,al /* able to change it */ |
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} |
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return (int)ret_value; |
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} |
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INLINE int read_via_flags(void) |
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{ char ret_value = 0; |
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__asm |
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{ |
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mov eax,0xC0000000 /* Centaur extended CPUID */ |
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cpuid |
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mov edx,0xc0000001 /* >= 0xc0000001 if support */ |
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cmp eax,edx /* for VIA extended feature */ |
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jnae no_rng /* flags is available */ |
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mov eax,edx /* read Centaur extended */ |
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cpuid /* feature flags */ |
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mov eax,NEH_FLAGS_MASK /* mask out and save */ |
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and eax,edx /* the RNG and ACE flags */ |
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or [via_flags],al /* present & enabled flags */ |
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mov ret_value,al /* able to change it */ |
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no_rng: |
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} |
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return (int)ret_value; |
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} |
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INLINE unsigned int via_rng_in(void *buf) |
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{ char ret_value = 0x1f; |
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__asm |
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{ |
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push edi |
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mov edi,buf /* input buffer address */ |
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xor edx,edx /* try to fetch 8 bytes */ |
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NEH_RNG /* do RNG read operation */ |
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and ret_value,al /* count of bytes returned */ |
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pop edi |
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} |
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return (int)ret_value; |
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} |
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INLINE void via_ecb_op5( |
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const void *k, const void *c, const void *s, void *d, int l) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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NEH_ECB |
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} |
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} |
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INLINE void via_cbc_op6( |
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const void *k, const void *c, const void *s, void *d, int l, void *v) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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mov eax, (v) |
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NEH_CBC |
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} |
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} |
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INLINE void via_cbc_op7( |
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const void *k, const void *c, const void *s, void *d, int l, void *v, void *w) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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mov eax, (v) |
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NEH_CBC |
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mov esi, eax |
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mov edi, (w) |
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movsd |
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movsd |
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movsd |
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movsd |
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} |
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} |
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INLINE void via_cfb_op6( |
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const void *k, const void *c, const void *s, void *d, int l, void *v) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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mov eax, (v) |
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NEH_CFB |
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} |
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} |
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INLINE void via_cfb_op7( |
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const void *k, const void *c, const void *s, void *d, int l, void *v, void *w) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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mov eax, (v) |
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NEH_CFB |
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mov esi, eax |
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mov edi, (w) |
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movsd |
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movsd |
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movsd |
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movsd |
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} |
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} |
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INLINE void via_ofb_op6( |
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const void *k, const void *c, const void *s, void *d, int l, void *v) |
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{ __asm |
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{ |
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NEH_REKEY |
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mov ebx, (k) |
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mov edx, (c) |
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mov esi, (s) |
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mov edi, (d) |
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mov ecx, (l) |
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mov eax, (v) |
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NEH_OFB |
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} |
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} |
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#elif defined( __GNUC__ ) |
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#define NEH_REKEY asm("pushfl\n popfl\n\t") |
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#define NEH_ECB asm(".byte 0xf3, 0x0f, 0xa7, 0xc8\n\t") |
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#define NEH_CBC asm(".byte 0xf3, 0x0f, 0xa7, 0xd0\n\t") |
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#define NEH_CFB asm(".byte 0xf3, 0x0f, 0xa7, 0xe0\n\t") |
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#define NEH_OFB asm(".byte 0xf3, 0x0f, 0xa7, 0xe8\n\t") |
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#define NEH_RNG asm(".byte 0x0f, 0xa7, 0xc0\n\t"); |
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INLINE int has_cpuid(void) |
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{ int val; |
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asm("pushfl\n\t"); |
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asm("movl 0(%esp),%eax\n\t"); |
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asm("xor $0x00200000,%eax\n\t"); |
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asm("pushl %eax\n\t"); |
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asm("popfl\n\t"); |
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asm("pushfl\n\t"); |
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asm("popl %eax\n\t"); |
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asm("xorl 0(%esp),%edx\n\t"); |
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asm("andl $0x00200000,%eax\n\t"); |
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asm("movl %%eax,%0\n\t" : "=m" (val)); |
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asm("popfl\n\t"); |
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return val ? 1 : 0; |
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} |
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INLINE int is_via_cpu(void) |
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{ int val; |
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asm("xorl %eax,%eax\n\t"); |
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asm("cpuid\n\t"); |
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asm("xorl %eax,%eax\n\t"); |
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asm("subl $0x746e6543,%ebx\n\t"); |
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asm("orl %ebx,%eax\n\t"); |
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asm("subl $0x48727561,%edx\n\t"); |
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asm("orl %edx,%eax\n\t"); |
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asm("subl $0x736c7561,%ecx\n\t"); |
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asm("orl %ecx,%eax\n\t"); |
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asm("movl %%eax,%0\n\t" : "=m" (val)); |
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val = (val ? 0 : 1); |
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via_flags = (val | NEH_CPU_READ); |
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return val; |
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} |
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INLINE int read_via_flags(void) |
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{ unsigned char val; |
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asm("movl $0xc0000000,%eax\n\t"); |
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asm("cpuid\n\t"); |
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asm("movl $0xc0000001,%edx\n\t"); |
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asm("cmpl %edx,%eax\n\t"); |
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asm("setae %al\n\t"); |
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asm("movb %%al,%0\n\t" : "=m" (val)); |
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if(!val) return 0; |
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asm("movl $0xc0000001,%eax\n\t"); |
||||||
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asm("cpuid\n\t"); |
||||||
|
asm("movb %%dl,%0\n\t" : "=m" (val)); |
||||||
|
val &= NEH_FLAGS_MASK; |
||||||
|
via_flags |= val; |
||||||
|
return (int) val; |
||||||
|
} |
||||||
|
|
||||||
|
INLINE int via_rng_in(void *buf) |
||||||
|
{ int val; |
||||||
|
asm("pushl %edi\n\t"); |
||||||
|
asm("movl %0,%%edi\n\t" : : "m" (buf)); |
||||||
|
asm("xorl %edx,%edx\n\t"); |
||||||
|
NEH_RNG |
||||||
|
asm("andl $0x0000001f,%eax\n\t"); |
||||||
|
asm("movl %%eax,%0\n\t" : "=m" (val)); |
||||||
|
asm("popl %edi\n\t"); |
||||||
|
return val; |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_ecb_op5( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
NEH_ECB; |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_cbc_op6( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l, void *v) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
asm("movl %0, %%eax\n\t" : : "m" (v)); |
||||||
|
NEH_CBC; |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_cbc_op7( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l, void *v, void *w) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
asm("movl %0, %%eax\n\t" : : "m" (v)); |
||||||
|
NEH_CBC; |
||||||
|
asm("movl %eax,%esi\n\t"); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (w)); |
||||||
|
asm("movsl; movsl; movsl; movsl\n\t"); |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_cfb_op6( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l, void *v) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
asm("movl %0, %%eax\n\t" : : "m" (v)); |
||||||
|
NEH_CFB; |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_cfb_op7( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l, void *v, void *w) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
asm("movl %0, %%eax\n\t" : : "m" (v)); |
||||||
|
NEH_CFB; |
||||||
|
asm("movl %eax,%esi\n\t"); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (w)); |
||||||
|
asm("movsl; movsl; movsl; movsl\n\t"); |
||||||
|
} |
||||||
|
|
||||||
|
INLINE volatile void via_ofb_op6( |
||||||
|
const void *k, const void *c, const void *s, void *d, int l, void *v) |
||||||
|
{ |
||||||
|
NEH_REKEY; |
||||||
|
asm("movl %0, %%ebx\n\t" : : "m" (k)); |
||||||
|
asm("movl %0, %%edx\n\t" : : "m" (c)); |
||||||
|
asm("movl %0, %%esi\n\t" : : "m" (s)); |
||||||
|
asm("movl %0, %%edi\n\t" : : "m" (d)); |
||||||
|
asm("movl %0, %%ecx\n\t" : : "m" (l)); |
||||||
|
asm("movl %0, %%eax\n\t" : : "m" (v)); |
||||||
|
NEH_OFB; |
||||||
|
} |
||||||
|
|
||||||
|
#else |
||||||
|
#error VIA ACE is not available with this compiler |
||||||
|
#endif |
||||||
|
|
||||||
|
INLINE int via_ace_test(void) |
||||||
|
{ |
||||||
|
return has_cpuid() && is_via_cpu() && ((read_via_flags() & NEH_ACE_FLAGS) == NEH_ACE_FLAGS); |
||||||
|
} |
||||||
|
|
||||||
|
#define VIA_ACE_AVAILABLE (((via_flags & NEH_ACE_FLAGS) == NEH_ACE_FLAGS) \ |
||||||
|
|| (via_flags & NEH_CPU_READ) && (via_flags & NEH_CPU_IS_VIA) || via_ace_test()) |
||||||
|
|
||||||
|
INLINE int via_rng_test(void) |
||||||
|
{ |
||||||
|
return has_cpuid() && is_via_cpu() && ((read_via_flags() & NEH_RNG_FLAGS) == NEH_RNG_FLAGS); |
||||||
|
} |
||||||
|
|
||||||
|
#define VIA_RNG_AVAILABLE (((via_flags & NEH_RNG_FLAGS) == NEH_RNG_FLAGS) \ |
||||||
|
|| (via_flags & NEH_CPU_READ) && (via_flags & NEH_CPU_IS_VIA) || via_rng_test()) |
||||||
|
|
||||||
|
INLINE int read_via_rng(void *buf, int count) |
||||||
|
{ int nbr, max_reads, lcnt = count; |
||||||
|
unsigned char *p, *q; |
||||||
|
aligned_auto(unsigned char, bp, 64, 16); |
||||||
|
|
||||||
|
if(!VIA_RNG_AVAILABLE) |
||||||
|
return 0; |
||||||
|
|
||||||
|
do |
||||||
|
{ |
||||||
|
max_reads = MAX_READ_ATTEMPTS; |
||||||
|
do |
||||||
|
nbr = via_rng_in(bp); |
||||||
|
while |
||||||
|
(nbr == 0 && --max_reads); |
||||||
|
|
||||||
|
lcnt -= nbr; |
||||||
|
p = (unsigned char*)buf; q = bp; |
||||||
|
while(nbr--) |
||||||
|
*p++ = *q++; |
||||||
|
} |
||||||
|
while |
||||||
|
(lcnt && max_reads); |
||||||
|
|
||||||
|
return count - lcnt; |
||||||
|
} |
||||||
|
|
||||||
|
#endif |
||||||
Reference in new issue